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1.2
date	2012.11.17.01.52.48;	author svnexp;	state Exp;
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1.1
date	2012.08.25.12.02.13;	author rwatson;	state Exp;
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1.2
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@#
# BERI_TEMPLATE -- a template kernel configuration for the SRI/Cambridge
# "BERI" (Bluespec Extensible RISC Implementation) FPGA soft core CPU.  This
# kernel configuration file will be included by other board-specific files,
# and so contains only BERI features common across all board targets.
#
# $FreeBSD: head/sys/mips/conf/BERI_TEMPLATE 239679 2012-08-25 12:02:13Z rwatson $
#

ident		BERI_TEMPLATE

machine		mips mips64

cpu		CPU_BERI

options 	HZ=200

makeoptions	ARCH_FLAGS="-march=mips64 -mabi=64"

makeoptions 	KERNLOADADDR=0xffffffff80100000

include		"../beri/std.beri"

makeoptions	DEBUG=-g		#Build kernel with gdb(1) debug symbols

makeoptions	MODULES_OVERRIDE=""

options 	DDB
options 	KDB
options 	ALT_BREAK_TO_DEBUGGER
options 	KTRACE

options 	CAPABILITY_MODE
options 	CAPABILITIES

options 	SCHED_ULE

options 	FFS			#Berkeley Fast Filesystem

options 	INET
options 	INET6
options 	NFSCL
options 	NFS_ROOT

# Debugging for use in -current
#options 	DEADLKRES		#Enable the deadlock resolver
options 	INVARIANTS		#Enable calls of extra sanity checking
options 	INVARIANT_SUPPORT	#Extra sanity checks of internal structures, required by INVARIANTS
#options 	WITNESS			#Enable checks to detect deadlocks and cycles
#options 	WITNESS_SKIPSPIN	#Don't run witness on spinlocks for speed

device		geom_map

device		md
device		ether
device		loop
device		random
device		snp
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1.1
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@SVN rev 239679 on 2012-08-25 12:02:13Z by rwatson

Add reference kernel configurations for FreeBSD/beri in simulation, on the
Terasic DE-4, and Terasic tPad Altera-based boards.

Sponsored by:	DARPA, AFRL
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